This \emph{Delay-Adder-Gain} (DAG) block diagram represents a system with 3 components required to implement an LCCDE given by $y(n) = \alpha y(n-1) + x(n)$.  The components required are adders, multipliers, and delay blocks. The minimum number of delay blocks is the order of the filter.


%\includegraphics{images/feedback/dag.ps}

\begin{center}
\begin{pspicture}(0,-3.5)(8,2)

\rput(0,0){$x$}
\rput(7.2,0){$y$}
\rput(5.5,-1.25){$z^{-1}$}
\rput(3.5,-2){$\alpha$}
\rput(1.5,-2.5){$H$}

% plus or minus for adder
\rput(2.1,-0.5){$-$}
\rput(1.45,0.35){$+$}

\psframe(1,-3)(6.5,1)

\pspolygon(4,-1.5)(4,-2.5)(2.5,-2)

\psline[linewidth=1.25 pt, arrowscale=1.5]{->}(0.25,0)(1.5,0)
\psline[linewidth=1.25 pt, arrowscale=1.5]{->}(1.75,-2)(1.75,-0.25)
\psline[linewidth=1.25 pt, arrowscale=1.5]{->}(5.5,-2)(4,-2)
\psline[linewidth=1.25 pt](2.5,-2)(1.75,-2)
\psline[linewidth=1.25 pt, arrowscale=1.5]{->}(2,0)(7,0)
\psline[linewidth=1.25 pt](5.5,-1.7)(5.5,-2)
\psline[linewidth=1.25 pt]{->}(5.5,0)(5.5,-0.75)

\psframe(5, -1.7)(6,-0.75)

\pscircle(1.75,0){0.25}
\psline(1.5,0)(2,0)
\psline(1.75,0.25)(1.75,-0.25)

\end{pspicture}
\end{center}


Notice that the DAG block diagram shows the delay block with $z^{-1}$. This is because $y(n-1) \ftp e^{-i\omega}Y(\omega) = z^{-1}Y(\omega)$. The DAG shows a system that is rational in $z=e^{i\omega}$. Here is an example of a signal whose DTFT is not rational in $z=e^{i\omega}$:

$$ x(n) = \frac{\sin(An)}{\pi n} $$

The fourier transform of this signal is the ideal low-pass filter:


%\includegraphics{images/idealpass/idealpass.ps}

\psset{unit=1cm}
\begin{center}
\begin{pspicture}(1,-1)(3,1.3)

%axis
\psline(1,0)(3,0)
% 0 
\psline(2,0.1)(2,-0.1)

% pi and -pi
\psline(1,0.1)(1,-0.1)
\rput(1,-0.25){$-\pi$}
\psline(3,0.1)(3,-0.1)
\rput(3,-0.25){$\pi$}

\rput(3.3,-0.25){$\omega$}
\rput(3,1){$H(\omega)$}
\rput(1.35,1){$(1)$}

\psline(1.5,0)(1.5,1)
\psline(1.5,1)(2.5,1)
\psline(2.5,1)(2.5,0)

\rput(2,-0.25){0}
\rput(1.5,-0.25){-A}
\rput(2.5,-0.25){A}



\end{pspicture}
\end{center}

This system is an "ideal low-pass" filter because we cannot implement it. The cuttoff/rolloff can never be vertical like the filter shows in the frequency domain. If the filter has an LCCDE, it is implementable, but otherwise we cannot.

Delay-Adder-Gain Block Diagrams